1. Field of the Technical Disclosure
The present disclosure relates generally to computer aided design (CAD) of integrated circuit (IC), and more specifically to techniques for generating standard cell library components which have increased signal routing resources.
2. Related Art
With respect to IC design, a standard cell generally refers to a circuit containing semiconductor devices (for example, transistors, resistor, capacitor, etc.) which are interconnected, and perform a desired operation. For example, a set of interconnected transistors that performs a NAND logical operation on a set of inputs may be termed a NAND standard cell. Standard cells are typically building blocks (typically represented at the gate level) using which more complex circuits may be realized.
Descriptions of a standard cell in terms of both the logical operation as well as physical structure (layout on semiconductor, interconnections etc) are often provided in “soft” form, for example, as a set of data items in a file (as opposed to the hardware, which represents a corresponding realization in an integrated circuit). A standard cell library refers to a repository storing such descriptions, and each of such descriptions is often termed a component (the terms cell and component are used interchangeably in some instances in this document).
A designer may select a component from a standard cell library, and connect several (typically large number) of such components to realize a more complex circuit. As an example, a designer using electronic design automation (EDA) tools for designing an IC may select components stored in a standard cell library, interconnect the components using a schematic editor, simulate the functional behavior of the IC, and generate a set of data that can be provided to a foundry for fabricating the IC.
As is well known in the relevant arts, a standard cell may include one or more metal layers used to provide both power/ground connections to devices (e.g., transistors) in the standard cell, as well as to provide interconnections between the (terminals of) devices in the cell, and between two or more standard cells. Interconnections (connecting paths) between two or more standard cells (for example, to connect the output(s) of one cell to the input(s) of another cell) are referred to as signal routes.
One desirable feature during signal routing (determination of the shape, dimensions, placement etc., of connecting paths between cells) is increased availability of signal routing resources. Signal routing resources refer to area on the metal layers that is available for the interconnections to carry signals (as opposed to power/ground connections and connections internal to the cell) between two or more standard cells. At least in portions of an IC containing a substantial number of closely clustered and small sized (small implementation area) components, it may be desirable to use standard cell components in which more metal layer area is available for signal routing.
Several aspects of the present invention enable generating standard cell components with increased signal routing resources.
In the drawings, like reference numbers generally indicate identical, functionally similar, and/or structurally similar elements. The drawing in which an element first appears is indicated by the leftmost digit(s) in the corresponding reference number.